Many analog-to-digital (ADC) and digital-to-analog (DAC) converter architectures use matched components and/or references, including resistors, capacitors, transistors, voltage and current sources, single-bit DACs and the like, hereinafter referred to as unit elements (UEs). (It is noted that, although many examples that follow throughout this specification illustrate DAC architectures, embodiments herein may apply to ADCs, DACs (including DACs internal to an ADC), and other circuits or apparatus. Unless otherwise stated, the terms “converters” and “conversion” shall include both ADCs and DACs.)
Physical variables such as fabrication process variations, temperature gradients across circuits, component aging, and component noise may cause circuit component values to differ from their design values. These variations result in mismatch errors which may cause undesirable artifacts at circuit outputs, including non-linearity and harmonic distortion. Digital dynamic element matching (DEM) structures rearrange mismatched elements by reordering bits of the digital inputs used to select the mismatched elements. Particular reordering sequences may be chosen to randomize output artifacts in predetermined ways in a process referred to as “mismatch shaping.”
Consider the following example. A dynamic element matched DAC may be implemented with a thermometer encoder, a vector quantizer including a sorting network and UE selection logic, and a set of internal UE DACs. Output signals from the set of UE DACs are integrated to construct portions of the output waveform. The circuit may be structured such that, at a given point in the conversion process, the output waveform is proportional to the number of UE DACs selected. The greater the number of UE DACs selected at a given point in the conversion process, the larger the magnitude of the output. It is noted that, except for the cases of all DACs selected or no DACs selected, the number of DACs selected is a smaller subset of the set of UE DACs. Each DAC is a “unit element” DAC (that is, a DAC theoretically capable of producing the same output as any of the other internal UE DACs for a given input). Consequently, any subset of UE DACs selected will theoretically result in an output signal of the same magnitude as would be produced using a different subset of the same number of UE DACs.
Data flow through the example circuit may begin with a digital word to be converted appearing at the input to the thermometer encoder. Let us say for example, that the binary word to be converted is four bits wide. The thermometer encoder transforms the four bits of the word to be converted to a 15 line thermometer coded output appearing at the input to the vector quantizer. The vector quantizer randomizes the mapping between the thermometer coded output and the set of UE DACs.
Without the vector quantizer, each active thermometer code output line would always activate the same single-bit DAC. Repeating patterns of mismatch attributable to that particular DAC contribute to the above-described undesirable artifacts. Using DEM, the vector quantizer randomizes the mapping between the thermometer coded signal and the array of UE DACs. The effect is to alter positions of the mismatched UE DACs, in a “virtual” sense, to force the average DAC error due to mismatch of the UEs to be uniform over time.
The sorting network associated with the vector quantizer may be structured to “mismatch shape” the output in a particular way in order to attenuate undesirable artifacts. It is noted that, although a UE DAC was chosen for the example above, DEM may apply to UEs other than DACs, such as resistors, transistors, and the like.
Thus, DEM decreases the undesirable effect of the so-called “static mismatch” artifacts described above. However, DEM results in additional UE switching transitions, each of which causes a small but finite amount of output noise and distortion. The noise and distortion is due to mismatches in the timing of the various UE switching transitions, particularly mismatches between the unselected-to-selected and selected-to unselected switching transitions for a given UE.